edaWorkshop13 and CATRENE DTC - Program

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At this web page you find the programme of the edaWorkshop13 and CATRENE DTC. You may expand the programme for each session by clicking on the session title. You will find the detailed timetable, presentation titles and author names. If additional information like an abstract, curriculum vitae or (for attendees of the edaWorkshop13 and CATRENE DTC only) slides is available, a link below the presentation title is displayed.

You may download the programme as PDF file (1.61 MB).

Tuesday, May 14, 2013

08:45 - 10:30
Tuesday Keynotes
Moderator: Wolfgang Rosenstiel (edacentrum, D)

08:45Welcome
Helmut Warnecke (Silicon Saxony, Infineon Dresden)
09:00The Industrial Deployment of the Silicon Photonics Technology
Maurizio Zuffada (ST Microelectronics)
Abstract and Curriculum Vitae
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09:30Virtual Fabrication for Advanced CMOS
Gerold Schröpfer (COVENTOR, F)
Abstract and Curriculum Vitae
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10:00Design Challenges for Advanced CMOS
Jörg Winkler (GLOBALFOUNDRIES)
Abstract and Curriculum Vitae
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10:30 - 11:00
Coffee Break

11:00 - 12:30
Technical Session: Power Aware Design
Moderator: Dominique Marron (ST Microelectronics)

11:00Low-Power Design Considerations Using CMOS FDSOI for LTE Front Ends
Duncan Platt (Acreo)
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11:35Holistic Approach of Energy Efficiency for Smart Nomad Devices
Armand Castillejo (ST Ericsson)
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12:00Microfluidic Electrochemical Detection: Lab on a Chip
Jose Luis Conesa (AlphaSIP)
12:25Q&A
Dominique Marron (ST Microelectronics)

12:30 - 14:00
Lunch

14:00 - 15:30
Technical Session: Energy Efficient Computing
Moderator: Ahmed Jerraya (LETI)

14:00Tutorial: Energy Efficient Computing
Fabien Clermidy (CEA Tech, F)
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14:35Many Core Design, the STHORM Platform
Patrick Blouet (ST Ericsson)
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15:003D NoC
Abbas Sheibanyrad (TIMA)
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15:25Q&A
Ahmed Jerraya (LETI)

15:30 - 16:00
Coffee Break

16:00 - 17:30
Technical Session: Design Optimization for Analog and Mixed-Signal Systems
Moderator: Ir Kees Veelenturf (NXP)

16:00Looking Beyond DREAMS – Current AMS Design Technology Developments and Standardisation Initiatives
Martin Barnasconi (NXP)
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16:35A Fast and Accurate SystemC/SystemC-AMS Model for Transceiver Design
Guido Dolmans (IMEC, NL)
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17:00Closing the Gap Between SystemC/AMS Simulation and Lab-Based Validation
Thilo Vörtler (Fraunhofer IIS/EAS, D)
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17:25Q&A
Ir Kees Veelenturf (NXP)

17:30 - 18:30
Panel Session: Closing the Gap Between Technology and Application Needs
Moderator: Christoph Grimm (TU Kaiserslautern, D)

17:30Podiumsdiskussion:
Panel Session: Closing the Gap Between Technology and Application Needs

Martin Barnasconi (NXP)
Armin Kemna (ELMOS)
Raul Camposano (Nimbic)
Wolfgang Nebel (OFFIS)
Achim Graupner (ZMD)
Dimitar Valtchev (ProSyst)

18:30 - 19:30
Break

19:30 - 23:00
Conference Dinner

19:30Meeting point at hotel reception
19:45Arrival at „Sophienkeller“ (Taschenberg 3, 01067 Dresden)
20:00Dinner
23:00End of 1st day

Wednesday, May 15, 2013

09:00 - 10:00
Wednesday Keynotes
Moderator: Wolfgang Rosenstiel (edacentrum, D)

09:00Quality and Innovation - Drivers for Modern Automotive Electronics
Ulrich Abelein (AUDI AG)

Abstract and Curriculum Vitae
09:30Building Supercomputers from Mobile Processors
Alex Ramirez (BSC Barcelona)
Abstract and Curriculum Vitae
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10:00 - 10:15
Coffee Break

10:15 - 11:45
Technical Session: Design for Reliability
Moderator: Ralf Popp (edacentrum, D)

10:15RELY - Design Methods for Preventive Health Care
Hanno Melzner (Infineon)
Georg Georgakos (Infineon)
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10:50NBTI Effects on Clock Uncertainty and Applications in Continuous-Time Sigma-Delta Modulator
Hao Cai (Télécom)
Jean-François Naviner (Télécom ENS)
Hervé Petit (Télécom)
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The corresponding paper is published within the edaWorkshp proceedings.
11:15The DECO Framework: Reliability Simulation Based on a General Design Environment Communication Approach
Christoph Sohrmann (Fraunhofer IIS/EAS, D)
Roland Jancke (Fraunhofer-IIS/EAS, D)
André Lange (FhG IIS/EAS)
Leif Müller (Fraunhofer-IIS/EAS)
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The corresponding paper is published within the edaWorkshp proceedings.
11:40Q&A
Ralf Popp (edacentrum, D)

11:45 - 11:55
Introduction of the Poster Session
Moderator: Ralf Popp (edacentrum, D)

Comprising an overview on accepted scientific contributions (see Poster Exhibition below) and the project posters.

11:55 - 14:00
Poster Exhibition

Within the Poster Exhibition we will have posters concerning the following scientific contributions. Besides these reviewed contributions to edaWorkshop13, the poster exhibition will show results of all EDA projects funded by BMBF within IKT 2020.

11:55Poster:
SystemC Verification via Symbolic Simulation of an Intermediate Language

Hoang Minh Le (U Bremen)
Daniel Große (U Bremen)
Vladimir Herdt (University of Bremen / DFKI, D)
Rolf Drechsler (University of Bremen / DFKI, D)
The corresponding paper is published within the edaWorkshp proceedings.
11:55Poster:
Abstraction of the Switching Trap Model for a Power-Oriented NBTI-Simulation

Reef Eilers (OFFIS)
Carl Bergemann (OFFIS)
Domenik Helms (OFFIS, D)
Wolfgang Nebel (University of Oldenburg, D)
The corresponding paper is published within the edaWorkshp proceedings.
11:55Poster:
Using Analog Meta-Stabilities in Asynchronously Feed-Backed Circuits

Gürkan Uygur (U Erlangen-Nuernberg)
Sebastian Michael Sattler (U Erlangen-Nuernberg)
The corresponding paper is published within the edaWorkshp proceedings.
11:55Poster:
Towards More Dependable Verification of Parameter Variations Using Semi-Formal Techniques

Carna Zivkovic (TU Kaiserslautern, D)
Javier Moreno Molina (TU Kaiserslautern)
Xin Pan (TU Kaiserslautern)
Christoph Grimm (TU Kaiserslautern, D)
The corresponding paper is published within the edaWorkshp proceedings.

12:30 - 14:00
Lunch and Poster Exhibition

14:00 - 15:30
Technical Session: Heterogeneous Integration
Moderator: Bernard Candaele (Thales, F)

14:00Tutorial Heterogeneous Integration, Alternatives and Trends
Yann Lamy (LETI)
Michel Brizoux (Thales)
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14:353D-IC Design Flow
Dominique Marron (ST Microelectronics)
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15:00NEEDS: Design Methods for 3D Integrated Systems
Markus Olbrich (U Hannover, D)
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15:25Q&A
Bernard Candaele (Thales, F)

15:30 - 16:00
Coffee Break

16:00 - 17:30
Technical Session: ESL Flow and Their Standardization Requirements
Moderator: Denis Rousset (ST Ericson)

In order to anticipate the development of embedded software ahead of silicon availability and validate architectural choices, SoC Virtual platforms are now widely used in the semiconductor industry. To build efficiently these platforms, there is a need to a) integrate easily models from third parties, b) develop rapidly models for proprietary IPs and subsystems, and c) quickly assemble platforms and create derivatives. This requires relying on interoperable models and tools based on ESL standards. SystemC and IP-Xact are the two IEEE standards in this area. While they offer a foundation layer for creating and assembling models, there are still a lot of items which have not been covered yet, and this has implied to develop proprietary extensions. At the same time, ever increasing SoCs complexity requires to move up at the level of abstraction, and consider not only the architectural (post HW/SW partitioning) level, but also the system level to address efficiently all the aspects of complex system design and verification including functional and non-functional ones. This session will discuss current industry practices and needs, and will introduce requirements for the next standardization steps.

16:00Extending ESL Standards to Create a System Level Flow for Complex Systems-on-Chips: an Industrial Perspective
Laurent Maillet-Contoz (ST Microelectronics)
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16:40Model Driven Engineering for ESL Design: Perspectives on Synergies and Evolutions of OMG Standards
Arnaud Cuccuru (LETI)
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17:00Applying the New ESL Standards Efficiently to Raise the Abstraction Level and to Meet the Upcoming Mixed-Signal SoC Challenges
Karsten Einwich (Fraunhofer-IIS/EAS)
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17:25Q&A
Denis Rousset (ST Ericson)

17:30 - 18:00
Break

18:00 - 23:00
Social Event

18:00Meeting point at hotel reception for guided tour
18:15Guided tour at „Die Gläserne Manufaktur“ (Lennestraße 1, 01069 Dresden)
19:00Meeting point at hotel reception
19:15Arrival at Restaurant Lesage (located inside “Die Gläserne Manufaktur”)
19:30Award of „EDA-Medaille 2013“ W. Rosenstiel (edacentrum)
19:45Dinner
23:00End of 2nd day

Thursday, May 16, 2013

09:00 - 09:45
Thusday Keynote
Moderator: Erich Barke (edacentrum)

09:00Electromagnetic Simulation for Electronic Systems
Raul Camposano (Nimbic)
Abstract and Curriculum Vitae
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09:45 - 10:15
Coffee Break

10:15 - 13:00
Technical Session: Reliability and Aging
Moderator: Ulf Schlichtmann (TU München, D)

10:15RESCAR - Robust Design of New Electronic Components for Electric Mobility Applications
Ulrich Müller-Pschorr (Infineon)
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10:50Analysis of Aging Mitigation Techniques for Digital Circuits Considering Recovery Effects
Martin Barke (TU Muenchen)
Veit Kleeberger (TU München)
Christoph Werner (TU Muenchen)
Doris Schmitt-Landsiedel (TU Muenchen)
Ulf Schlichtmann (TU München, D)
The corresponding paper is published within the edaWorkshp proceedings.
11:15Timing Slack Monitoring for Reliability Diagnosis in Safety Critical Applications
Georg Georgakos (Infineon)
Nasim Pour Aryan (TU Muenchen)
M. Wirnshofer (TU Muenchen)
Soheil Aghaei (TU Muenchen)
Doris Schmitt-Landsiedel (TU Muenchen)
The corresponding paper is published within the edaWorkshp proceedings.
11:40Award of "EDA Achievement Award 2013"
More information on this award.

12:00 - 14:15
Poster Exhibition

Within the Poster Exhibition we will have posters concerning the following scientific contributions. Besides these reviewed contributions to edaWorkshop13, the poster exhibition will show results of all EDA projects funded by BMBF within IKT 2020.

12:00Poster:
Towards More Dependable Verification of Parameter Variations Using Semi-Formal Techniques

Carna Zivkovic (TU Kaiserslautern, D)
Javier Moreno Molina (TU Kaiserslautern)
Xin Pan (TU Kaiserslautern)
Christoph Grimm (TU Kaiserslautern, D)
The corresponding paper is published within the edaWorkshp proceedings.
12:00Poster:
Using Analog Meta-Stabilities in Asynchronously Feed-Backed Circuits

Gürkan Uygur (U Erlangen-Nuernberg)
Sebastian Michael Sattler (U Erlangen-Nuernberg)
The corresponding paper is published within the edaWorkshp proceedings.
12:00Poster:
Abstraction of the Switching Trap Model for a Power-Oriented NBTI-Simulation

Reef Eilers (OFFIS)
Carl Bergemann (OFFIS)
Domenik Helms (OFFIS, D)
Wolfgang Nebel (University of Oldenburg, D)
The corresponding paper is published within the edaWorkshp proceedings.
12:00Poster:
SystemC Verification via Symbolic Simulation of an Intermediate Language

Hoang Minh Le (U Bremen)
Daniel Große (U Bremen)
Vladimir Herdt (University of Bremen / DFKI, D)
Rolf Drechsler (University of Bremen / DFKI, D)
The corresponding paper is published within the edaWorkshp proceedings.

13:00 - 14:15
Lunch and Poster Exhibition

14:15 - 16:00
Technical Session: Verification, Analog-Mixed-Signal and Layout
Moderator: Erich Barke (edacentrum)

14:15MEMS2015 Leads to Schematic Driven MEMS Design
Ralf Sommer (IMMS, D)
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14:25A New SAT-Based Approach for Equivalence Checking of Hardware-Dependent Low-Level Embedded System Software
Carlos Villarraga (TU Kaiserslautern)
Bernard Schmidt (TU Kaiserslautern)
Jörg Bormann (TU Kaiserslautern)
Dominik Stoffel (TU Kaiserslautern)
Wolfgang Kunz (Technical University of Kaiserslautern, D)
The corresponding paper is published within the edaWorkshp proceedings.
15:00Propagation and Transformation of Constraints for AMS IC Designs
Andreas Krinke (TU Dresden)
Maximilian Mittag (Bosch)
Göran Jerke (Bosch, D)
Jens Lienig (TU Dresden, D)
The corresponding paper is published within the edaWorkshp proceedings.
15:25Considering Electromigration in Layout Synthesis of Future Technologies
Matthias Thiele (TU Dresden, D)
Jens Lienig (TU Dresden, D)
The corresponding paper is published within the edaWorkshp proceedings.
15:50Closing
Erich Barke (edacentrum)
15:55End of 3rd day

15:55 - 15:55
End of 3rd day

16:00 - 18:00
Open SANITAS SystemC Verification Workshop

For detailed information see enclosed workshop program.

16:00Open SANITAS SystemC Verification Workshop
Further information